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1 ltc2901 2901fb programmable quad supply monitor with adjustable reset and watchdog timers simultaneously monitors four supplies 16 user selectable combinations of 5v, 3.3v, 3v,2.5v, 1.8v, 1.5v and/or adj voltage thresholds guaranteed threshold accuracy: 1.5% of monitored voltage over temperature selectable supply tolerance: 5% and 10% belowmonitored voltage (ltc2901-3/ltc2901-4) low supply current: 43 a typ adjustable reset time adjustable watchdog time open-drain rst output (ltc2901-1/ltc2901-3) push-pull rst output (ltc2901-2/ltc2901-4) individual nondelayed monitor output for each supply power supply glitch immunity guaranteed rst for v cc 1v 16-lead narrow ssop package the ltc 2901 is a programmable supply monitor for systems with up to four supply voltages. one of 16 presetor adjustable voltage monitor combinations can be se- lected using an external resistor divider connected to the program pin. the preset voltage thresholds are accurate to 1.5% over temperature. all four voltage comparator outputs are connected to separate pins for individualsupply monitoring. the reset and watchdog delay times are adjustable using external capacitors. tight voltage threshold accuracy and glitch immunity ensure reliable reset operation without false triggering. the rst output is guaranteed to be in the correct state for v cc down to 1v. the ltc2901-1/ ltc2901-3 features an open-drain rst output, while the ltc2901-2/ ltc2901-4 has a push-pull rst output. the 43 a supply current makes the ltc2901 ideal for power conscious systems and it may be configured tomonitor less than four inputs. the parts are available in the 16-lead narrow ssop package. quadruple supply monitor (5v, 3.3v, 2.5v, 1.8v) desktop and notebook computers multivoltage systems telecom equipment portable battery-powered equipment network servers , lt, ltc and ltm are registered trademarks of linear technology corporation. v1v2 v ref v pg comp1comp2 comp3 comp4 wdi wdo rst gnd r1 59k 1% r310k power good r2 40.2k 1% c wt 47nf c rt 47nf c20.1 f c1 0.1 f v4 v3 ltc2901-2 cwt crt t rst = 216ms t wd = 940ms 2901 ta01 dc/dc converter 1.8v 2.5v 3.3v 5v system logic descriptio u features applicatio s u typical applicatio u quadruple supply monitor (5v, 3.3v, 2.5v, 1.8v) 10% undervoltage monitoring, watchdog asserts rst v1v2 v ref v pg comp1comp2 comp3 comp4 wdi tol rst gnd r1 59k 1% r310k power good r2 40.2k 1% c wt 47nf 5v c rt 47nf c20.1 f c1 0.1 f v4 v3 ltc2901-4 cwt crt t rst = 216ms t wd = 940ms 2901 ta01b dc/dc converter 1.8v 2.5v 3.3v 5v system logic patent pending. downloaded from: http:///
2 ltc2901 2901fb v1, v2, v3, v4, v pg ..................................... 0.3v to 7v rst (ltc2901-1/ltc2901-3) ..................... 0.3v to 7v rst (ltc2901-2/ltc2901-4) ....... 0.3v to (v2 + 0.3v) compx ....................................................... 0.3v to 7v cwt, wdi, wdo ......................................... 0.3v to 7v v ref , crt, tol ............................ 0.3v to (v cc + 0.3v) reference load current (i vref ) ............................ 1ma v4 input current (adj mode) ............................. ?ma absolute axi u rati gs w ww u (notes 1, 2, 3) operating temperature range ltc2901-1c/ltc2901-2c/ ltc2901-3c/ltc2901-4c ....................... 0 c to 70 c ltc2901-1i/ltc2901-2i/ ltc2901-3i/ltc2901-4i .................... 40 c to 85 c storage temperature range .................. 65 c to 150 c lead temperature (soldering, 10 sec)................... 300 c order part number gn16 part marking 2901129012 29011i 29012i t jmax = 125 c, ja = 110 c/w ltc2901-1cgnltc2901-2cgn ltc2901-1ign ltc2901-2ign package/order i for atio uu w consult ltc marketing for parts specified with wider operating temperature ranges. order part number gn16 part marking 2901329014 29013i 29014i ltc2901-3cgnltc2901-4cgn ltc2901-3ign ltc2901-4ign gn package 16-lead plastic ssop 12 3 4 5 6 7 8 top view 1615 14 13 12 11 10 9 comp3comp1 v3v1 crtrst wdo wdi comp2comp4 v2 v4 v ref v pg gndcwt gn package 16-lead plastic ssop 12 3 4 5 6 7 8 top view 1615 14 13 12 11 10 9 comp3comp1 v3v1 crtrst tol wdi comp2comp4 v2 v4 v ref v pg gndcwt symbol parameter conditions min typ max units v rt50 5v, 5% reset threshold v1 input threshold 4.600 4.675 4.750 v 5v, 10% reset threshold 4.350 4.425 4.500 v v rt33 3.3v, 5% reset threshold v1, v2 input threshold 3.036 3.086 3.135 v 3.3v, 10% reset threshold 2.871 2.921 2.970 v v rt30 3v, 5% reset threshold v2 input threshold 2.760 2.805 2.850 v 3v, 10% reset threshold 2.610 2.655 2.700 v v rt25 2.5v, 5% reset threshold v2, v3 input threshold 2.300 2.338 2.375 v 2.5v, 10% reset threshold 2.175 2.213 2.250 v v rt18 1.8v, 5% reset threshold v3, v4 input threshold 1.656 1.683 1.710 v 1.8v, 10% reset threshold 1.566 1.593 1.620 v v rt15 1.5v, 5% reset threshold v3, v4 input threshold 1.380 1.403 1.425 v 1.5v, 10% reset threshold 1.305 1.328 1.350 v v rta adj, 5% reset threshold v3, v4 input threshold 0.492 0.500 0.508 v adj, 10% reset threshold 0.466 0.473 0.481 v v rtan adj reset threshold v4 input threshold ?8 0 18 mv v cc minimum internal operating voltage rst, compx in correct logic state; 1v v cc rising prior to program the denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 5v, unless otherwise noted. (notes 3, 4) electrical characteristics t jmax = 125 c, ja = 110 c/w order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/ downloaded from: http:///
3 ltc2901 2901fb the denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 5v, unless otherwise noted. (notes 3, 4) electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximumrating condition for extended periods may affect device reliability and lifetime. note 2: all currents into pins are positive, all voltages are referenced to gnd unless otherwise noted.note 3: the greater of v1, v2 is the internal supply voltage (v cc ). note 4: 10% thresholds apply to the ltc2901-3/ltc2901-4 only when the tol pin is set to a logic high. note 5: under static no-fault conditions, v1 will necessarily supply quiescent current. if at any time v2 is larger than v1, v2 must be capable of supplyingthe quiescent current, programming (transient) current and reference load current. note 6: the output pins rst, wdo and compx have internal pull-ups to v2 of typically 6 a. however, external pull-up resistors may be used when faster rise times are required or for v oh voltages greater than v2. note 7: the push-pull rst output pin on the ltc2901-2/ltc2901-4 is actively pulled up to v2. symbol parameter conditions min typ max units v ccminp minimum required for programming v cc rising 2.42 v v ccminc minimum required for comparators v cc falling 2.32 v v ref reference voltage v cc 2.3v, i vref = 1ma, c ref 1000pf t0l low 1.192 1.210 1.228 v t0l high 1.128 1.146 1.163 v v pg programming voltage range v cc v ccminp 0v ref v i vpg v pg input current v pg = v ref 20 na i v1 v1 input current v1 = 5v, i vref = 12 a, (note 5) 43 75 a i v2 v2 input current v2 = 3.3v 0.8 2 a i v3 v3 input current v3 = 2.5v 0.52 1.2 a v3 = 0.55v (adj mode) ?5 15 na i v4 v4 input current v4 = 1.8v 0.34 0.8 a v4 = 0.55v (adj mode) ?5 15 na v4 = 0.05v (?dj mode) ?5 15 na i crt(up) crt pull-up current v crt = 0v 1.4 2 2.6 a i crt(dn) crt pull-down current v crt = 1.3v 10 20 30 a t rst reset time-out period c rt = 1500pf 579 m s t uv v x undervoltage detect to rst or compx v x less than reset threshold v rtx 150 s by more than 1% v ol output voltage low rst, compx i sink = 2.5ma; v1 = 3v, v2 = 3v; 0.15 0.4 v v3, v4 = 0v; v pg = 0v i sink = 100 a; v2 = 1v; v1, v3, v4 = 0v 0.05 0.3 v i sink = 100 a; v1 = 1v; v2, v3, v4 = 0v 0.05 0.3 v v oh output voltage high rst, wdo, compx i source = 1 a v2 ?1 v (note 6) v ol output voltage low wdo i sink = 2.5ma; v1 = 5v, v2 = 3.3v; 0.15 0.4 v v3, v4 = 1v; v pg = 0v v oh output voltage high rst i source = 200 a 0.8 ?v2 v (ltc2901-2/ltc2901-4) (note 7) i cwt(up) cwt pull-up current v cwt = 0v 1.4 2 2.6 a i cwt(dn) cwt pull-down current v cwt = 1.3v 10 20 30 a t wd watchdog time-out period c wt = 1500pf 20 30 40 ms v ih wdi input threshold high v cc = 3.3v to 5.5v 1.6 v v il wdi input threshold low v cc = 3.3v to 5.5v 0.4 v t wp wdi input pulse width v cc = 3.3v 150 ns i wdi wdi pull-up current v wdi = 0v 10 a digital input t0l v il t0l low level input voltage v cc = 3.3v to 5.5v 0.3v cc v v ih t0l high level input voltage v cc = 3.3v to 5.5v 0.7v cc v i intol t0l input current tol = v cc 0.1 1 a downloaded from: http:///
4 ltc2901 2901fb ti i g diagra s w u w v x monitor timing t rst 2901 td v rtx v x rst compx t uv 1.5v watchdog timing (ltc2901-1/ltc2901-2) t rst t wp t wd t wd 2901 td2 rst wdi wdo test circuits figure 1. rst, wdo, compx v oh test v1v2 v3 v4 2901 f01 ltc2901-1ltc2901-3 rst, wdoor compx i source 1 a figure 2. rst, wdo, compx v ol test v1v2 v3 v4 2901 f02 ltc2901-1ltc2901-3 i sink 2.5ma,100 a rst, wdoor compx figure 3. active pull-up rst v oh test v1v2 v3 v4 2901 f03 ltc2901-2ltc2901-4 rst i source 200 a watchdog timing (ltc2901-3/ltc2901-4) t rst t rst t wp t wd 2901 td3 rst wdi downloaded from: http:///
5 ltc2901 2901fb 2.5v threshold voltagevs temperature 1.8v threshold voltagevs temperature 1.5v threshold voltagevs temperature adj threshold voltagevs temperature adj threshold voltage vs temperature temperature ( c) ?0 threshold voltage, v rt25 (v) 2.37502.3675 2.3600 2.3525 2.3450 2.3375 2.3300 2.3225 2.3150 2.3075 2.3000 ?0 20 40 2901 g04 ?0 0 60 80 100 temperature ( c) ?0 1.655 threshold voltage, v rt18 (v) 1.665 1.675 1.685 1.695 ?0 20 60 100 2901 g05 1.705 1.7101.660 1.670 1.680 1.690 1.700 ?0 0 40 80 temperature ( c) ?0 threshold voltage, v rt15 (v) 1.4251.420 1.415 1.410 1.405 1.400 1.395 1.390 1.385 1.380 ?0 20 40 2901 g06 ?0 0 60 80 100 temperature ( c) ?0 threshold voltage, v rta (v) 0.5080.506 0.504 0.502 0.500 0.498 0.496 0.494 0.492 ?0 20 40 2901 g07 ?0 0 60 80 100 temperature ( c) ?0 threshold voltage, v rtan (v) 0.0180.012 0.006 0 0.006 0.012 0.018 ?0 20 40 2901 g08 ?0 0 60 80 100 typical perfor a ce characteristics uw 5v threshold voltagevs temperature 3.3v threshold voltagevs temperature 3v threshold voltagevs temperature temperature ( c) ?0 theshold voltage, v rt50 (v) 4.675 4.700 4.7504.725 0 40 100 2901 g01 4.6504.625 4.600 ?0 ?0 20 60 80 temperature ( c) ?0 threshold voltage, v rt33 (v) 3.1353.125 3.115 3.105 3.095 3.085 3.075 3.065 3.055 3.045 3.035 ?0 20 40 2901 g02 ?0 0 60 80 100 temperature ( c) ?0 threshold voltage, v rt30 (v) 2.8502.840 2.830 2.820 2.810 2.800 2.790 2.780 2.770 2.760 ?0 20 40 2901 g03 ?0 0 60 80 100 temperature ( c) ?0 v ref (v) 1.2281.222 1.216 1.210 1.204 1.198 1.192 ?0 20 40 2901 g23 ?0 0 60 80 100 v ref vs temperature downloaded from: http:///
6 ltc2901 2901fb typical perfor a ce characteristics uw typical transient durationvs comparator overdrive (v1, v2) rst output voltagevs v1, v pg = 0v reset time-out periodvs temperature i v2 vs temperature i v3 vs temperature i v4 vs temperature temperature ( c) ?0 0.5 i v2 ( a) 0.6 0.8 0.9 1.0 1.51.2 ?0 20 40 2901 g10 0.7 1.3 1.4 1.1 ?0 0 60 80 100 v1 = 5vv2 = 3.3v v3 = 2.5v v4 = 1.8v reset comparator overdrive voltage (% of v rtx ) 0.1 250 typical transient duration ( s) 300 350 400 450 11 01 0 0 2901 g13 200150 50 0 100 reset occursabove curve t a = 25 c v1 (v) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 rst output voltage (v) 2901 g14 54 3 2 1 0 v1 = v2 = v3 = v410k pull-up from rst to v1 t a = 25 c temperature ( c) ?0 ?0 watchdog time-out period, t wd (ms) 34 3836 60 80 2901 g15 3230 20 0 20 40 100 26 22 28 24 c wt = 1500pf (silver mica) watchdog time-out periodvs temperature temperature ( c) ?0 0.1 i v3 ( a) 0.2 0.4 0.5 0.6 1.10.8 ?0 20 40 2901 g11 0.3 0.9 1.0 0.7 ?0 0 60 80 100 v1 = 5vv2 = 3.3v v3 = 2.5v v4 = 1.8v temperature ( c) ?0 0 i v4 ( a) 0.1 0.3 0.4 0.5 1.00.7 ?0 20 40 2901 g12 0.2 0.8 0.9 0.6 ?0 0 60 80 100 v1 = 5vv2 = 3.3v v3 = 2.5v v4 = 1.8v reset comparator overdrive voltage (% of v rtx ) 0.1 80 typical transient duration ( s) 100 120 140 160 1 10 100 2901 g22 60 4020 0 200180 220 t a = 25 c reset occurs above curve typical transient durationvs comparator overdrive (v3, v4) temperature ( c) ?0 4.9 reset time-out period, t rst (ms) 5.9 6.4 6.9 8.97.9 ?0 20 40 2901 g16 5.4 8.4 7.4 ?0 0 60 80 100 c rt = 1500pf (silver mica) i v1 vs temperature temperature ( c) ?0 0 i v1 ( a) 10 30 40 50 100 70 ?0 20 40 2901 g09 20 80 90 60 ?0 0 60 80 100 v1 = 5vv2 = 3.3v v3 = 2.5v v4 = 1.8v downloaded from: http:///
7 ltc2901 2901fb rst, wdo, compx voltage output low vs output sink current rst high level output voltagevs output source current (ltc2901-2/ltc2901-4) rst, wdo, compx i sink vs supply voltage typical perfor a ce characteristics uw v1 or v2 (v) 0 0 i sink (ma) 2 4 6 1 2 34 2901 g19 5 8 10 1 3 5 7 9 6 v ol = 0.4v t a = 25 c v ol = 0.2v i sink (ma) 0 v ol (v) 20 40 50 90 2901 g20 10 30 60 70 80 3.02.5 2.0 1.5 1.0 0.5 0 85 c 25 c ?0 c v2 = 3vv1 = 5v reset time-out periodvs capacitance c rt (farad) 10p 100p 10n 1 10 1 100m 10m 1m 100 2901 g18 1n 100n reset time-out period, t rst (sec) t a = 25 c i source (ma) 0 0.5 2 v oh (v) 3.53.0 2.5 2.0 1.5 1.0 0.5 0 2901 g21 2.5 1.5 1 85 c 25 c ?0 c v1 = 5vv2 = 3v v3 = 2.5v v4 = 1v watchdog time-out periodvs capacitance c wt (farad) 10p 100p 10n 1 100 10 1 100m 10m 1m 2901 g17 1n 100n watchdog time-out period, t wd (sec) t a = 25 c v2 (v) 1 0 pull-up current ( a) 2 6 8 10 2014 2 3 3.5 2901 g24 4 16 18 12 1.5 2.5 4 4.5 5 t a = 25 c compx and wdo pull-upcurrent vs v2 (compx and wdo held at 0v) compx propagation delay vs inputoverdrive above threshold input overdrive above threshold (mv) compx propagation delay ( s) 250200 v1, v2v3, v4 150 2901 g25 0 100 50 1000 10 100 t a = 25 c rst pull-up current vs v2(ltc2901-1/ltc2901-3) rst pull-up current vs v2(ltc2901-2/ltc2901-4) v2 (v) 2 0 pull-up current ( a) 4 8 12 2.5 3 3.5 4 2901 g26 4.5 16 20 2 6 10 14 18 5 t a = 25 c v rt25 v rt30 v rt33 v2 (v) 2 0 pull-up current (ma) 2 4 5 2.5 3 3.5 4 2901 g27 4.5 1 3 6 5 t a = 25 c v rt25 v rt30 v rt33 downloaded from: http:///
8 ltc2901 2901fb uu u pi fu ctio s comp3 (pin 1): comparator output 3. nondelayed, active high logic output with weak pull-up to v2. pulls high whenv3 is above reset threshold. may be pulled greater than v2 using external pull-up. comp1 (pin 2): comparator output 1. nondelayed, active high logic output with weak pull-up to v2. pulls high whenv1 is above reset threshold. may be pulled greater than v2 using external pull-up. v3 (pin 3): voltage input 3. select from 2.5v, 1.8v, 1.5v or adj. see table 1 for details.v1 (pin 4): voltage input 1. select from 5v or 3.3v. see table 1 for details. the greater of (v1, v2) is also v cc for the device. bypass this pin to ground with a 0.1 f (or greater) capacitor.crt (pin 5): reset delay time programming pin. attach an external capacitor (c rt ) to gnd to set a reset delay time of 4.6ms/nf. leaving the pin open generates a minimumdelay of approximately 50 s. a 47nf capacitor will gener- ate a 216ms reset delay time.rst (pin 6): reset logic output. active low with weak pull-up to v2 (ltc2901-1/ltc2901-3) or active pull-up tov2 (ltc2901-2/ltc2901-4). pulls low when any voltage input is below the reset threshold and held low for the programmed delay time after all voltage inputs are above threshold. may be pulled above v2 using an external pull- up (ltc2901-1/ltc2901-3 only). wdo (pin 7): ltc2901-1/ltc2901-2 watchdog output. active low logic output with weak pull-up to v2. may bepulled greater than v2 using external pull-up. the watch- dog output pulls low if the watchdog timer is allowed to time out and remains low until set high by the next wdi transistion or anytime rst is low. the watchdog timer is enabled when rst is high. t0l (pin 7): ltc2901-3/ltc2901-4 digital input for sup- ply tolerance selection (5% or 10%). a logic low selects5% thresholds; a logic high selects 10% thresholds. wdi (pin 8): watchdog input. a logic input whose rising or falling edge must occur on this pin (while rst is high)within the selected watchdog time-out period, prohibiting a high-to-low transition on the wdo pin (ltc2901-1/ ltc2901-2). the watchdog time-out period is set by the value of the capacitor that is attached to the cwt pin. a rising or falling edge on the wdi pin clears the voltageon the c wt capacitor, preventing wdo from going low. when disabling the watchdog function, tie cwt to gnd.for the ltc2901-3/ltc2901-4, a watchdog time-out due to a missed wdi edge issues an rst pulse on the rst pin (the wdo function is merged into the rst function). cwt (pin 9): watchdog time-out programming pin. attach a capacitor (c wt ) between cwt and gnd to set a watchdog time-out period of 20ms/nf. leaving the pinopen generates a minimum time-out of approximately 200 s. a 47nf capacitor will generate a 940ms watchdog time-out period.gnd (pin 10): ground. v pg (pin 11): voltage threshold combination select in- put. connect to an external 1% resistive divider betweenv ref and gnd to select 1 of 16 combinations of preset and/ or adjustable voltage thresholds (see table 1). do not add capacitance on the v pg pin. v ref (pin 12): buffered reference voltage. a 1.210v nominal reference used for programming voltage (v pg ) and for the offset of negative adjustable applications. thebuffered reference can source and sink up to 1ma. the reference can drive a bypass capacitor of up to 1000pf without oscillation. v4 (pin 13): voltage input 4. select from 1.8v, 1.5v, adj or adj. see table 1 for details. v2 (pin 14): voltage input 2. select from 3.3v, 3v or 2.5v. see table 1 for details. the greater of (v1, v2) is also v cc for device. bypass this pin to ground with a 0.1 f (or greater) capacitor. all logic outputs (comp1, comp2,comp3, comp4, rst, wdo) are weakly pulled up to v2 (ltc2901-1/ltc2901-3). rst is actively pulled up to v2 in the ltc2901-2/ltc2901-4. comp4 (pin 15): comparator output 4. nondelayed, active high logic output with weak pull-up to v2. pulls highwhen v4 is above reset threshold. may be pulled greater than v2 using external pull-up. comp2 (pin 16): comparator output 2. nondelayed, active high logic output with weak pull-up to v2. pulls highwhen v2 is above reset threshold. may be pulled greater than v2 using external pull-up. downloaded from: http:///
9 ltc2901 2901fb + + + + 4 14 3 13 v1v2 v3 resistive divider matrix v4 10 gnd a/d buffer 11 v pg 12 v ref 5 crt 8 wdi c rt 2901 db-1 bandgap reference adjustable reset pulse generator transition detect watchdog timer power detect v1v2 v cc 6 rst v2 ltc2901-1 ltc2901-2 v2 6 a 22 a 10 a 9 cwt c wt 2 a 15 comp4 v2 6 a 1 comp3 v2 6 a 16 comp2 v2 6 a 2 comp1 v2 6 a 7 wdo v2 v cc v cc v cc 6 a 22 a 2 a 6 rst block diagra w ltc2901-1/ltc2901-2 downloaded from: http:///
10 ltc2901 2901fb block diagra w ltc2901-3/ltc2901-4 + + + + 4 14 3 13 v1v2 v3 resistive divider matrix v4 10 gnd a/d buffer 11 v pg 12 v ref 7 tol 5 crt 8 wdi c rt 2901 db-1 bandgap reference buffer gain adjust adjustable reset pulse generator transition detect watchdog timer power detect v1v2 v cc 6 rst v2 ltc2901-3 ltc2901-4 v2 6 a 22 a 10 a 9 cwt c wt 2 a 15 comp4 v2 6 a 1 comp3 v2 6 a 16 comp2 v2 6 a 2 comp1 v2 6 a v cc v cc v cc 22 a 2 a 6 rst downloaded from: http:///
11 ltc2901 2901fb applicatio s i for atio wu uu power-upthe greater of v1, v2 is the internal supply voltage (v cc ). on power-up, v cc will power the drive circuits for the rst and the compx pins. this ensures that the rst and compxoutputs will be low as soon as v1 or v2 reaches 1v. the rst and compx outputs will remain low until the part is programmed. after programming, if any one of the v x inputs is below its programmed threshold, rst will be a logic low.once all the v x inputs rise above their thresholds, an inter- nal timer is started and rst is released after the pro-grammed delay time. if v cc < (v3 ?1) and v cc < 2.4v, the v3 input impedance will be low (1k typ). monitor programmingthe ltc2901 input voltage combination is selected by placing the recommended resistive divider from v ref to gnd and connecting the tap point to v pg , as shown in figure 4. table 1 offers recommended 1% resistor valuesfor the various modes. the last column in table 1 specifies optimum v pg /v ref ratios ( 0.01) to be used when pro- gramming with a ratiometric dac.during power-up, once v1 or v2 reaches 2.4v max, the monitor enters a programming period of approximately 150 s during which the voltage on the v pg pin is sampled and the monitor is configured to the desired input combi-nation. do not add capacitance to the v pg pin. immediately after programming, the comparators are enabled andsupply monitoring will begin. supply monitoring the ltc2901 is a low power, high accuracy program- mable quad supply monitoring circuit with four nondelayed monitor outputs, a common reset output and a watchdog timer. watchdog and reset timing are both adjustable using external capacitors. single pin programming selects 1 of 16 input voltage monitor combinations. all four voltage inputs must be above predetermined thresholds for the reset not to be invoked. the ltc2901 will assert the reset and comparator outputs during power-up, power- down and brownout conditions on any one of the voltage inputs. the inverting inputs on the v3 and/or v4 comparators are set to 0.5v when the positive adjustable modes are selected (figure 5). the tap point on an external resistive divider, connected between the positive voltage being sensed and ground, is connected to the high impedance noninverting inputs (v3, v4). the trip voltage is calculated from: vv r r trip =+ ?? ? ?? ? 05 1 3 4 . in the negative adjustable mode, the noninverting input onthe v4 comparator is connected to ground (figure 6). the tap point on an external resistive divider, connected be- tween the negative voltage being sensed and the v ref pin, is connected to the high impedance inverting input (v4).v ref provides the necessary level shift required to operate at ground. the trip voltage is calculated from: vv r r v v no al trip ref ref = ?? ? ?? ? = ; . min 3 4 1 210 figure 4. monitor programming 1211 10 r1 1% r21% 2901 f04 v ref v pg gnd ltc2901 table 1. voltage threshold programming v pg mode v1 (v) v2 (v) v3 (v) v4 (v) r1 (k ) r2 (k )v ref 0 5.0 3.3 adj adj open short 0.000 1 5.0 3.3 adj adj 93.1 9.53 0.094 2 3.3 2.5 adj adj 86.6 16.2 0.156 3 3.3 2.5 adj adj 78.7 22.1 0.219 4 3.3 2.5 1.5 adj 71.5 28.0 0.281 5 5.0 3.3 2.5 adj 66.5 34.8 0.344 6 5.0 3.3 2.5 1.8 59.0 40.2 0.406 7 5.0 3.3 2.5 1.5 53.6 47.5 0.469 8 5.0 3.0 2.5 adj 47.5 53.6 0.531 9 5.0 3.0 adj adj 40.2 59.0 0.594 10 3.3 2.5 1.8 1.5 34.8 66.5 0.656 11 3.3 2.5 1.8 adj 28.0 71.5 0.719 12 3.3 2.5 1.8 adj 22.1 78.7 0.781 13 5.0 3.3 1.8 adj 16.2 86.6 0.844 14 5.0 3.3 1.8 adj 9.53 93.1 0.906 15 5.0 3.0 1.8 adj short open 1.000 downloaded from: http:///
12 ltc2901 2901fb applicatio s i for atio wu uu in a negative adjustable application, the minimum valuefor r4 is limited by the sourcing capability of v ref ( 1ma). with no other load on v ref , r4 (minimum) is: 1.21v 1ma = 1.21k . tables 2 and 3 offer suggested 1% resistor values forvarious adjustable applications. once the resistor divider is set in the 5% tolerance mode (ltc2901-3/ltc2901-4), there is no need to change the divider for the 10% mode because the internal and exter- nal reference is scaled accordingly, moving the trip point by ?%. although all four supply monitor comparators have built- in glitch immunity, bypass capacitors on v1 and v2 are recommended because the greater of v1 or v2 is also the v cc for the device. filter capacitors on the v3 and v4 inputs are allowed.power-down on power-down, once any of the v x inputs drop below their threshold, rst and compx are held at a logic low.a logic low of 0.4v is guaranteed until both v1 and v2 drop below 1v. if the bandgap reference becomes invalid (v cc < 2v typ), the part will reprogram once v cc rises above 2.4v max. monitor output rise and fall time estimationall of the outputs (rst, compx, wdo) have strong pull- down capability. if the external load capacitance (c load ) for a particular output is known, output fall time (10% to90%) is estimated using: t fall 2.2 ?r pd ?c load where r pd is the on-resistance of the internal pull-down transistor. the typical performance curve (v ol vs i sink ) demonstrates that the pull-down current is somewhatlinear versus output voltage. using the 25 c curve, r pd is estimated to be approximately 40 . assuming a 150pf load capacitance, the fall time is about 13.2ns.although the outputs are considered to be ?pen-drain, they do have a weak pull-up capability (see compx or rst figure 6. setting the negative adjustable trip point + 2901 f06 v4 v ref 13 12 v trip r41% r31% ltc2901 table 2. suggested 1% resistor values for the adj inputs v supply (v) v trip (v) r3 (k ) r4 (k ) 12 11.25 2150 100 10 9.4 1780 100 8 7.5 1400 100 7.5 7 1300 100 6 5.6 1020 100 5 4.725 845 100 3.3 3.055 511 100 3 2.82 464 100 2.5 2.325 365 100 1.8 1.685 237 100 1.5 1.410 182 100 1.2 1.120 124 100 1 0.933 86.6 100 0.9 0.840 68.1 100 table 3. suggested 1% resistor values for the adj input v supply (v) v trip (v) r3 (k ) r4 (k ) 2 ?.87 187 121 5 4.64 464 121 5.2 4.87 487 121 ?0 9.31 931 121 ?2 ?1.30 1130 121 figure 5. setting the positive adjustable trip point + + 0.5v 2901 f05 v3 or v4 v trip r31% r41% ltc2901 downloaded from: http:///
13 ltc2901 2901fb pull-up current vs v2 curve). output rise time (10% to90%) is estimated using: t rise 2.2 ?r pu ?c load where r pu is the on-resistance of the pull-up transistor. the on-resistance as a function of the v2 voltage at roomtemperature is estimated using: r v pu = 610 21 5 with v2 = 3.3v, r pu is about 260k. using 150pf for load capacitance, the rise time is 86 s. if the output needs to pull up faster and/or to a higher voltage, a smallerexternal pull-up resistor may be used. using a 10k pull- up resistor, the rise time is reduced to 3.3 s for a 150pf load capacitance. the ltc2901-2 has an active pull-up to v2 on the rstoutput. the typical performance curve (rst pull-up cur- rent vs v2 curve) demonstrates that the pull-up current is somewhat linear versus the v2 voltage and r pu is esti- mated to be approximately 625 . a 150pf load capaci- tance makes the rise time about 206ns.watchdog timer the watchdog circuit typically monitors a p? activity. the p is required to change the logic state of the wdi pin on a periodic basis in order to clear the watchdog timer andprevent the wdo pin (ltc2901-1/ltc2901-2) from going low. whenever rst is low, the watchdog timer is cleared and wdo is set high. the watchdog timer is started when rst pulls high. subsequent edges received on the wdi pin will clear the watchdog timer. the timer will continue to run until the watchdog timer times out. once the watchdog timer times out, internal circuitry will bring the wdo pin low. wdo will remain low and the watchdog timer will remain cleared until the next edge is received on the wdi pin or until rst goes low. in the ltc2901-3/ltc2901-4, there is no wdo pin. instead, the rst pin is pulled low for the programmed reset time- out period whenever a wdi edge is missed. in this manner, a full system reset can be issued after a watchdog failure. to disable the watchdog timer, simply ground the cwt pin (pin 9). with cwt held at ground, any reset event will force wdo high indefinitely. it is safe to leave the wdi pin (pin 8) unconnected because the weak internal pull-up (10 a typ) will pull wdi high. tying wdi to v1 or ground is also allowed, but grounding the wdi pin will force thepull-up current to be drawn continuously. selecting the reset timing capacitor the reset time-out period is adjustable in order to accom- modate a variety of microprocessor applications. the reset time-out period, t rst , is adjusted by connecting a capacitor, c rt , between the crt pin and ground. the value of this capacitor is determined by: c rt = t rst ?217 ?10 ? with c rt in farads and t rst in seconds. the c rt value per millisecond of delay can also be expressed as c rt /ms = 217 (pf/ms). leaving the crt pin unconnected will generate a mini-mum reset time-out of approximately 50 s. maximum reset time-out is limited by the largest available lowleakage capacitor. the accuracy of the time-out period will be affected by capacitor leakage (the nominal charging current is 2 a) and capacitor tolerance. a low leakage ceramic capacitor is recommended.selecting the watchdog timing capacitor the watchdog time-out period is adjustable and can be optimized for software execution. the watchdog time-out period, t wd , is adjusted by connecting a capacitor, c wt , between the cwt pin and ground. given a specifiedwatchdog time-out period, the capacitor is determined by: c wt = t wd ?50 ?10 ? with c wt in farads and t wd in seconds. the c wt value per millisecond of delay can also be expressed as c wt /ms = 50 (pf/ms).leaving the cwt pin unconnected will generate a mini- mum watchdog time-out of approximately 200 s. maxi- mum time-out is limited by the largest available lowleakage capacitor. the accuracy of the time-out period will be affected by capacitor leakage (the nominal charging current is 2 a) and capacitor tolerance. a low leakage ceramic capacitor is recommended. applicatio s i for atio wu uu downloaded from: http:///
14 ltc2901 2901fb monitoring power supply controller activity figure 7 demonstrates how the ltc2901 can be used tomonitor switcher activity. the monitor is configured to supervise 3.3v, 2.5v, 1.8v and one adjustable input. because 2.5v does not exist in this application, the v2 input is tied to the v1 (3.3v) input. the feedback voltage on the ltc1772 (0.8v typ) is monitored with the adjust- able input (v4). the rst pin will go high 216ms (c rt = 47nf) after the 3.3v and 1.8v supplies and the feedback voltage are above threshold. individual inputstatus is available at the compx pins. while the voltage monitors can detect low voltage orshorted inputs, the watchdog circuit can be used to detect an open circuit to the primary load. with the cwt pin unconnected, the watchdog time-out is approximately 200 s. at low load currents on the 1.8v supply, the ltc1772 will go into burst mode operation. with an open-ciruit load, the duty cycle at the gate of m1 will drop,and the pulse spacing will exceed the watchdog time-out applicatio s i for atio wu uu period. the wdo pin will go low indicating the low loadcondition. the wdo pin will return high on the next pulse to the gate of m1. the wdo pin will remain high if the load is restored. ensuring reset valid for v cc down to 0v (ltc2901-2/ltc2901-4)some applications require the reset output (rst) to be valid with v cc down to 0v. the ltc2901-2 is designed to handle this requirement with the addition of an externalresistor from rst to ground. the resistor will provide a path for stray charge and/or leakage currents, preventing the rst output from floating to undetermined voltages when connected to high impedance (such as cmos logic inputs). the resistor value should be small enough to provide effective pull-down without excessively loading the active pull-up circuitry. too large a value may not pull down well enough. a 100k resistor from rst to ground is satisfactory for most applications. + comp1comp2 comp3 comp4 rst wdo crt cwt v1v2 v3 v4 wdi v ref v pg gnd 216 1 15 6 7 5 9 3.3v monitor1.8v monitor feedback monitor common reset out low load indicator 4 14 3 13 8 1211 10 ltc2901-2 pgate v in sense i th gndv fb 65 4 m1 d1 12 3 ltc1772 r1 28k 1% r50.15 r610k r3100k r480.6k c247 f 6v v out 1.8v0.5a v in 3.3v l1 10 h r2 71.5k 1% c rt 47nf 2901 f07 c110 f 10v c3220pf c1: taiyo yuden ceramic lmk325bj106k-tc2: sanyo poscap 6tpa47m d1: motorola mbrm120t3 l1: coiltronics up1b-100 m1: si3443dv r5: dale 0.25w figure 7. monitor input, output, feedback voltage and low load conditions on dc/dc controller burst mode is a registered trademark of linear technology corporation. downloaded from: http:///
15 ltc2901 2901fb typical applicatio s u quad supply monitor with watchdog timer disabled 5v, 3v, 1.8v, 12v (adj) comp2comp4 v2v4 v ref v pg gnd cwt 12 3 4 5 6 7 8 1615 14 13 12 11 10 9 comp3comp1 v3 v1 crt rst wdo wdi r3 2.15m 1% system reset 1.8v 3v 12v 5v c rt r4100k 1% ltc2901 v trip = 11.25v 2901 ta02 5v, ?v monitor with watchdog timer disabled and unused v2, v3 inputs pulled above trip thresholds comp2comp4 v2v4 v ref v pg gnd cwt 12 3 4 5 6 7 8 1615 14 13 12 11 10 9 comp3comp1 v3 v1 crt rst wdo wdi r4 121k 1% r3 464k 1% system reset ?v 5v r286.6k 1% r116.2k 1% ltc2901 v trip = 4.64v 2901 ta03 c rt quad supply monitor with led undervoltage indicators 5v, 3.3v, 2.5v, 1.5v comp2comp4 v2v4 v ref v pg gnd cwt 12 3 4 5 6 7 8 1615 14 13 12 11 10 9 comp3comp1 v3 v1 crt rst wdo wdi system reset watchdog status wdi 1.5v 3.3v 5v 2.5v r247.5k 1% r153.6k 1% r l2 1k led ltc2901 2901 ta04 c rt c wt r l4 1k led r l3 1k led r l1 1k led generate reset pulse through watchdog timeout (ltc2901-1/ltc2901-2) 2901 ta06 comp2comp4 v2v4 v ref v pg gnd cwt 12 3 4 5 6 7 8 1615 14 13 12 11 10 9 comp3comp1 v3 v1 crt rst wdo wdi adj 10k 3.3v 5v rst wdi c wt ltc2901 c rt t rst t wd ~20 s rst wdi wdo information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. downloaded from: http:///
16 ltc2901 2901fb lt 0807 rev b ?printed in usa ? linear technology corporation 2002 comp1comp2 comp3 comp4 rst wdo crt cwt v1v2 v3 v4 wdi v ref v pg gnd 216 1 15 6 7 5 9 2.5v monitor12v monitor ?v monitor common reset out ac present 4 14 3 13 8 1211 10 ltc2901-1 c wt 680pf 2901 ta05 c rt2 47nf 78.7k 1% 121k1% 187k1% q12n3904 2.15m 1% 12v 2.5v 0.1 f ?v 100k 1% 100k 22.1k 1% 10k comp1comp2 comp3 comp4 rst wdo crt cwt v1v2 v3 v4 wdi v ref v pg gnd 216 1 15 6 7 5 9 5v monitor3.3v monitor 1.8v monitor 5.2v monitor 12v5v 3.3v 2.5v 1.8v ?v 5.2v 4 14 3 13 8 1211 10 ltc2901-1 3.3v 5v 0.1 f 1.8v 1n4148 c rt1 47nf 16.2k 1% 121k1% 487k1% lowvoltage secondary ac/dc dc/dc converters 5.2v 86.6k 1% 10k 1n4148 100k 120v ac t rst1 + t rst2 = 432ms t wd = 13.6ms monitor seven supplies (12v, 5v, 3.3v, 2.5v, 1.8v, ?v, ?.2v) with sequenced reset and ac present indication typical applicatio u linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com u package descriptio gn package 16-lead plastic ssop (narrow .150 inch) (reference ltc dwg # 05-08-1641) .016 ?.050 (0.406 ?1.270) .015 .004 (0.38 0.10) 45 0 ?8 typ .007 ?.0098 (0.178 ?0.249) .0532 ?.0688 (1.35 ?1.75) .008 ?.012 (0.203 ?0.305) typ .004 ?.0098 (0.102 ?0.249) .0250 (0.635) bsc gn16 (ssop) 0204 12 3 4 5 6 7 8 .229 ?.244 (5.817 ?6.198) .150 ?.157** (3.810 ?3.988) 16 15 14 13 .189 ?.196* (4.801 ?4.978) 12 11 10 9 .009 (0.229) ref .254 min recommended solder pad layout .150 ?.165 .0250bsc .0165 .0015 .045 .005 *dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side **dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side inches (millimeters) note:1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale part number description comments ltc694-3.3 3.3v supply monitor, watchdog timer and battery backup 2.9v threshold ltc1326 micropower precision triple supply monitor for 5v, 3.3v and adj 4.725v, 3.118v, 1v thresholds ( 0.75%) ltc1726-2.5 micropower triple supply monitor for 2.5v, 3.3v and adj adjustable reset and watchdog time-outs ltc1727-2.5/ltc1727-5 micropower triple supply monitors with open-drain reset individual monitor outputs in msop ltc1728-1.8/ltc1728-3.3 micropower triple supply monitor with open-drain reset 5-lead sot-23 package ltc2900 programmable quad supply monitor adjustable reset timer, 10-lead msop and 3mm 3mm 10-lead dfn ltc2902 programmable quad supply monitor adjustable reset timer, supply tolerance and margining functions, 16-lead narrow ssop ltc2903 precision quad supply monitor in 6-lead sot-23 a variety of factory trimmed voltage combinations ltc2904/ltc2905 precision dual supply monitors pin selectable thresholds ltc2906/ltc2907 ltc2908 precision six supply monitor 8-lead sot-23 and dfn packages related parts downloaded from: http:///

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